EK4259-01
SPDT High Power UltraCMOS® 10 MHz–3.0 GHz RF Switch
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Features

• Single-pin or complementary CMOS logic control inputs
• Low insertion loss:
- 0.35 dB @ 1000 MHz
- 0.5 dB @ 2000 MHz
• Isolation of 30 dB @ 1000 MHz
• High ESD tolerance of 2 kV HBM
• Typical input 1 dB compression point of +33.5 dBm
• 1.8V minimum power supply voltage
• Ultra-small SC-70 package

Specifications

Evaluation Kit

The SPDT switch EK Board was designed to easecustomer evaluation of Peregrine’s PE4259. TheRF common port is connected through a 50Ωtransmission line via the top SMA connector, J1.RF1 and RF2 are connected through 50Ω transmission lines via SMA connectors J2 and J3,respectively. A through 50Ω transmission isavailable via SMA connectors J4 and J5. Thistransmission line can be used to estimate the lossof the PCB over the environmental conditionsbeing evaluated.

The board is constructed of a two metal layer FR4material with a total thickness of 0.031”. Thebottom layer provides ground for the RFtransmission lines. The transmission lines weredesigned using a coplanar waveguide with groundplane model using a trace width of 0.0476”, tracegaps of 0.030”, dielectric thickness of 0.028”,metal thickness of 0.0021” and εr of 4.4.

J6 and J7 provide a means for controlling DC anddigital inputs to the device. J6-1 is connected tothe device VDD or CTRL input. J7-1 is connectedto the device CTRL input.

Pin Configuration

Part Numbering System

Part Marking System

Ordering Guide

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Block Diagram

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