74HC32PW
Quad 2-input OR gate
  • QUANTITY
  • 0
  • Lead Time:
  • D/C [Date Code]:
  • N/A
  • Packing Condition:

Features

• Wide supply voltage range from 2.0 to 6.0 V
• CMOS low power dissipation
• High noise immunity
• Latch-up performance exceeds 100 mA per JESD 78 Class II Level B
• Complies with JEDEC standards:
• JESD8C (2.7 V to 3.6 V)
• JESD7A (2.0 V to 6.0 V)
• Input levels:
• For 74HC32: CMOS level
• For 74HCT32: TTL level
• Symmetrical output impedance
• Balanced propagation delays
• ESD protection:
• HBM JESD22-A114F exceeds 2000 V
• MM JESD22-A115-A exceeds 200 V
• Multiple package options
• Specified from -40 °C to +85 °C and from -40 °C to +125 °C

Specifications


Pin Configuration

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Part Numbering System

Part Marking System

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Ordering Guide

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Block Diagram

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