74HCT574PW,118
Octal D-type flip-flop; positive edge-trigger; 3-state
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Features

• Wide supply voltage range from 2.0 to 6.0 V
• CMOS low power dissipation
• High noise immunity
• Latch-up performance exceeds 100 mA per JESD 78 Class II Level B
• Complies with JEDEC standards:
♦ JESD8C (2.7 V to 3.6 V)
♦ JESD7A (2.0 V to 6.0 V)
• Input levels:
♦ For 74HC574: CMOS level
♦ For 74HCT574: TTL level
• 3-state non-inverting outputs for bus oriented applications
• 8-bit positive, edge-triggered register
• Common 3-state output enable input
• ESD protection:
♦ HBM JESD22-A114F exceeds 2000 V
♦ MM JESD22-A115-A exceeds 200 V
• Specified from -40 °C to +85 °C and from -40 °C to +125 °C

Specifications


Pin Configuration

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Part Numbering System

Part Marking System

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Ordering Guide

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Block Diagram

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관련상품